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Ms. A. V. Ananthalakshmi
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Brief Biodata of Ms. A. V. Ananthalakshmi
Name : Ms. A. V. Ananthalakshmi
Designation : Assistant Professor
Department : Electronics and Communication
College Address : Pondicherry Engineering College, Puducherry-14
phone No. :Mobile:7639738297
E-mail : anantha_av@pec.edu
Educational Qualifications
| University | Degree | Year of Passing | Specialization |
|---|---|---|---|
| Madras University | B.E | 2001 | Electronics and Communication |
| Manipal University | M.S | 2003 | VLSI - CAD |
| Pondicherry University | Ph.D | (Currently Pursuing) | Low Power VLSI Design |
Employment record : 10 years experience
| University/college | Designation | Period |
|---|---|---|
| Velammal Engineering College | Lecturer | June 2003 - May 2004 |
| R.M.K. Engineering College | Lecturer | July 2004 - Dec 2006 |
| IFET Engineering College | Lecturer | Jan 2006 - 9th August 2007 |
| Pondicherry Engineering College | Lecturer | 10th August 2007 - August 2008 |
| Pondicherry Engineering College | Assistant Professor | August 2008 - till date |
Publications
Conferences
1. G.F.Sudha, A.V.AnanthaLakshmi and B.Sarojini, "Energy Efficient Architecture for Portable Device", Proceedings of the International Conference on Frontiers of Computer Science, August 2011, pp. 91 - 93. ISBN No.: 978-81-921929-0-1
2. A.V.AnanthaLakshmi, G.F.Sudha, "Design of a Novel Reversible Full adder and Reversible Full Subtractor", Springer Proceedings of the International Conference on Advances in Computing and Information Technology(ACITY), July 2012, Vol. 178, pp.623 - 632. ISBN No.: 978-3-642-31599-2
3. A.V.AnanthaLakshmi, G.F.Sudha, "An Efficient Implementation of a Reversible Single Precision Floating Point Multiplier Using 4:3 Compressor", Elsevier Proceedings of the International Conference on Advances in Information Technology and Mobile Communications(AIM), April 2013, pp. 229 - 238.
4. A.V.AnanthaLakshmi, G.F.Sudha, "Transistor Representation of a Low Power Reversible 32-bit Comparator", Springer Proceedings of the International Conference on Advanced Computing, Networking and Informatics (ICACNI), June 2013, Vol. 243, pp. 63 -74, ISSN : 1867-5662
Journals
1. A.V.AnanthaLakshmi, G.F.Sudha, " Design of 4-Bit Reversible Shift Registers", WSEAS Transactions on Circuits and Systems, Vol. 12, No.12, December 2013, pp. 376 - 385, E-ISSN : 2224 - 266X.
2. A.V.AnanthaLakshmi, G.F.Sudha, "Design of a reversible single precision floating point subtractor", SpringerPlus Journal, January 2014, 3 : 11, doi:10.1186/2193-1801-3-11. ISSN: 2193-1801
3. A.V.AnanthaLakshmi, G.F.Sudha, " Area and Speed Efficient Reversible Fused Radix-2 FFT Unit Using 4:3 Compressor", International Journal on Recent Trends in Engineering and Technology, Vol. 10, No.2, January 2014, pp. 172 - 186, doi: 01.IJRTET.10.2.1453. ISSN: 2158-5563
4. A.V.AnanthaLakshmi, G.F.Sudha, "Design of an efficient reversible single precision floating point adder", International Journal of Computational Intelligence Studies, Inderscience Publishers, In Press. ISSN online: 1755-4985. ISSN print: 1755-4977
Membership of Professional Organization: Life member of ISTE
Conferences, short term courses etc participated: 12
Field of Interest: Low Power VLSI Design, Reversible Logic
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